1. Field of the Invention
This disclosure relates to design of an integrated circuit (IC), and in particular to designs for minimizing the effect of transient events on the operation of that IC.
2. Description of the Related Art
In some automotive sensor applications it required that the sensor is able to withstand exposure to a large negative voltage transient event. Withstand of this exposure typically means two things. First, the IC used in the sensor and all of its protective passive components must not be damaged during the exposure. Second, the sensor must recover from the exposure and output an accurate signal within a specified amount of time. Some applications are demanding reductions in the sensor recovery times.
Most modern ICs for automotive sensor applications contain both an analog core and a digital core. Failure to comply with recovery time requirements is usually dominated by the possibility of a reset of the digital core of the IC for IC recovery times greater than the required sensor recovery time requirement. The analog blocks of the IC typically recovers much more quickly than digital blocks. As a result, focus for the solution to this problem falls on maintaining critical digital core processes during a transient event to eliminate the possibility of digital reset.
Thus, what are needed are methods and apparatus to avoid an IC reset following a large negative capacitively coupled voltage pulse with respect to IC negative supply reference or a method to shorten the digital block recovery time. The concepts disclosed herein focus on the objective to avoid an IC reset following a large negative capacitively coupled voltage transient to the positive reference power supply node of an IC.